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Intel Hardware IT Science Technology

Intel Shrinks Transistor Size By 30% 258

Posted by Hemos from the how-long-until-market dept.
pinkUZI writes "Intel will announce that it has crammed 500 million transistors on to a single memory chip, shrinking them in size by 30%. " The tech details are sadly lacking in the article - but I'm sure those will follow. Indeed, the Yahoo piece gives the details that "...has created a fully functional 70 megabit memory chip with transistor switches measuring just 35 nanometers."
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Intel Shrinks Transistor Size By 30% More

Intel Shrinks Transistor Size By 30%

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  • In related news... (Score:5, Funny)

    by swordboy ( 472941 ) on Monday August 30, 2004 @09:53AM (#10108720) Journal
    In related news, Intel stated that this new manufacturing process will help their processors more effectively compete with charcoal on a heat density versus cost basis.

    • Re:In related news... (Score:5, Insightful)

      by addaon ( 41825 ) <addaon+slashdot@nOsPAM.gmail.com> on Monday August 30, 2004 @10:02AM (#10108808)
      It's for a memory chip... when was the last time you had a memory chip that produced a noticeable amount of heat? (Hint: Rambus.) When was the last time you had a memory chip that produced an unacceptable amount of heat? (Well, if you're stretching, some of the SRAM's that HP used for caches in the PA-RISC boxes...)

      • Re:In related news... (Score:5, Insightful)

        by swordboy ( 472941 ) on Monday August 30, 2004 @10:14AM (#10108914) Journal
        This is Intel's 65 nanometer process announcement. Right now, they are at 90 nanometers. They always test the process using SRAM cells. This doesn't mean that Intel won't use the process for CPUs and what not.

        But as a rule of thumb, the closer you bunch up the transistors, the higher the electrical leakage. This is why the current chips are consuming more power than ever. At 65 nanometers, we'll be 30 percent smaller but also leak 30 percent more. This leakage causes heat.

        Intel's paperwork shows that they believe that practical transistors will stop shrinking at approximately 320 watts/cm^2 which is nearing the heat density of a nuclear reactor (500w/cm^2). This will take place at the 45nm level in 2007.

        • Re:In related news... (Score:5, Informative)

          by randyest ( 589159 ) on Monday August 30, 2004 @10:37AM (#10109089) Homepage
          Your post is accurate and informative in general, but there's one nit I must pick:

          But as a rule of thumb, the closer you bunch up the transistors, the higher the electrical leakage.

          It's not the bunching up (density) of the transistors that increases leakage current (static power consumption,) it's the gate size. Narrower gates are less good at being the perfect insulators they should be. The thinner dielectric allows more leakage current, and can even break completely if the voltage is too high, which is why smaller-geometry processes often allow (or require) lower operating voltages, which helps reduce synamic (switching) power.

          Of course, it's the shrinking of the gates (and the rest of the transistors) that allows them to be bumched up more (placed in higher density,) so maybe you meant it that way . . .

          • Re:In related news... (Score:5, Insightful)

            by dslbrian ( 318993 ) on Monday August 30, 2004 @11:14AM (#10109393)

            Narrower gates are less good at being the perfect insulators they should be. The thinner dielectric allows more leakage current, and can even break completely if the voltage is too high

            I think your describing the wrong mechanism - deep submicron device leakage is dominated by drain-source subthreshold currents (hot-electron effects and whatnot), not by gate-source currents.

            • Re:In related news... (Score:5, Informative)

              by randyest ( 589159 ) on Monday August 30, 2004 @11:33AM (#10109584) Homepage
              There are three components to leakage current in DSM CMOS devices. From here [66.102.7.104] in order of magnitude: (1) source-drain junction leakage current (2) gate-direct tunneling leakage, and (3) sub-threshold leakage current.

              And while neither of us pointed out all three, the fact remains that it's not the "bunching up" of the transistors that increases leakage, it's the gate and transistor sizes (which tend to scale together.) Which was the point I was trying to make.

              If you think gate leakage is negligible compared to sub-threshold leakage, you'd better tell the IEEE [66.102.7.104] and all those people working on high-K gate dielectrics [google.com].
          • Also an important point to consider with decreasing voltages is the accuracy of the device. As we decrease the voltage values corresponding to logical values we can increase the frequency of oscillation between the junction terminals. The only problem is that increasing the frequency increases the depletion layer capacitance. So in a CPU situation, they are limited to the response of the minority charge carriers arriving in the n-channel region of the P-N junction in the CMOS transister.

            The future may r

        • Apparently run with no more leakage than 90nm (Score:4, Informative)

          by ssclift ( 97988 ) on Monday August 30, 2004 @10:41AM (#10109130)

          The actual Intel press release [intel.com] claims that:

          "Intel's leading strained silicon technology, first implemented in its 90nm process technology, is further enhanced in the 65nm technology. The second generation of Intel strained silicon increases transistor performance by 10 to 15 percent without increasing leakage. Conversely, these transistors can cut leakage by four times at constant performance compared to 90nm transistors. As a result, the transistors on Intel's 65nm process have improved performance without significant increase in leakage (greater electrical current leakage results in greater heat generation)."

        • I'll join the other poster to pick some nits as well. The value you give is more like a heat flux (energy/time/area) than a heat density, which would have units of something like "energy/volume." Also, strictly speaking there may or may not be such a thing as a heat density (depending on what you mean) because heat by definition only exists when it's being transferred.

          What is the physical significance of the number you quoted as the "heat density" of a nuclear reactor? Which area is being measured?
          • Ok, I'll also pick a nit them.
            heat by definition only exists when it's being transferred
            Bzzzztttt...wrong. We can say that at seconds after the big ban the whole universe had a temperature (a measure of heat) of X. Since the temperature at that time was uniform there was no heat transfer (just cooling due to the expansion of the universe). Heat does not NEED to transfer to exist, however it almost always DOES transfer due to the nature of heat.
      • Memory chips can get really hot! I have a Athlon 2800+ system at home and I use 2 modules of 512MB Kingston HyperX SDRAM (yeah, those that come with a stylish blue heatsink) in it. Recently, I measured the temperature of various system components and was quite surprized that the hottest parts under heavey loads where actually these SDRAM modules! With a 2,2,2,5 timing I could measure 57C!

    • Re:In related news... (Score:2, Funny)

      by Anonymous Coward
      In related news, Intel announces new business line to integrate processes into countertop ranges. An anonymous source stated that "the processors have shown a 23.82% increase in performance compared to the GE Profile(TM) 30" Free-Standing Electric Convection Range Model#: JB988SHSS". GE declined to respond to this new vendor in the home kitchen appliance market.
    • I remember reading this SciFi book where there is a computer that has three fat tubes sticking out: the first one is for power, the second for icecubes(in) and the last for steam(out).
    • With all these gags about heat, does anyone realize we're talking about RAM and not CPUs? RAM doesn't usually use that much electricity, so I'm not sure why everyone thinks it's so funny to complain about "heat, heat, heat!".

      In case anyone's interested, wikipedia has an article [wikipedia.org] on how DRAM and other memory technologies work. You'll note the use of capacitors. i.e. If the chips were loosing a lot of heat to resistance, the capacitors wouldn't be capable of maintaining their charge.
    • In related news, Intel stated that this new manufacturing process will help their processors more effectively compete with charcoal on a heat density versus cost basis. - Yeah, that's *Informative* allright.

      Now you are only allowed to mode this post as either "Insightful" or "Troll".

  • Heat (Score:5, Insightful)

    by shfted! ( 600189 ) on Monday August 30, 2004 @09:55AM (#10108737) Journal
    I'm waiting for Intel to reduce heat output by 30%. 130 watts for a top end P4 is pretty insane, when a top end Opteron is only 100 watts. I don't care how small it is.

    • Re:Heat (Score:2, Interesting)

      by brejc8 ( 223089 ) *
      Actually reducing transistor size by 30% has a double inpact on the heat dissaption reducing it down by half (70%^2).
      • How do you figure that? You seem to be assuming that operating voltage also drops 30%, which I didn't see anywhere in the article.

        That is to say: power is not related to gate size except that smaller gates may allow lower voltage (which affects power in a good way) and smaller gates have much higher leakage current (which affects power in a bad way.)

        Just dropping the gate without also dropping operating voltage actually increases power, since dynamic power stays the same and leakage (static) power in
        • Pretty simple. Of cause if you drop the dimention the power consumption decreases. Think about the capasitence. The only reason why people think process reduction doesn't reduce power is because your speed increases and the number of components per chip increases. If you have the same crappy design on your new tech and run it at the same speed you will see a reduction in power consumption.

          • Re:Heat (Score:5, Informative)

            by randyest ( 589159 ) on Monday August 30, 2004 @11:21AM (#10109470) Homepage
            With all due respect, I think you're confused. For the same operating voltage, dynamic power does not decrease with decreasing gate size/transitor size.

            P=1/2*Ceff*V^2*f*N+Q*V*f*N+I1*V

            where P is power consumption, Ceff is effective load capacitance, f is frequency, V is source voltage, N is signal switching coefficient, Q is charge due to through-type current, and I1 is leakage current.

            While the actual gate capacitance driven may be reduced by virtue of it's smaller size, the effective capacitance (that "seen" by the driver) stays roughly the same, or may even get higher from parasitic capacitance. The only thing sure to change is the leakage current, which will increase as gates shrink.

            Maybe this [66.102.7.104] will help you understand.
      • Not necessarily, leakage current starts to become a major component of heat disipation at smaller sizes. That's why the last die shrink for the P4 didn't help much with power, the active current state above nominal was reduced but leakage current grew a ton.

    • Re:Heat (Score:5, Interesting)

      by Ignignot ( 782335 ) on Monday August 30, 2004 @10:01AM (#10108801) Journal
      It is likely that the new chip doesn't produce any more heat than the old one. It is a very simple effect: smaller transistors require less power to operate. Also, if they did consume the same amount of power in a much smaller space they'd end up as slag, no matter what cooling solution used. This means that if they were to make a current chip using the new 30% smaller technology, the result would probably produce about 30% less heat and use that much less power.

      I don't really understand what the big deal is comparing the heat outputs of the P4 and Opteron is anyway, it isn't like these are mobile cpu's. I do have an Athlon 64 under the hood now, but heat output has never been a real concern of mine when selecting a cpu. I'll never understand the processor tribalism that has infected some computer users. Just use what's best for the job.

      • Re:Heat (Score:5, Informative)

        by randyest ( 589159 ) on Monday August 30, 2004 @10:11AM (#10108886) Homepage
        Well, sorta.

        Smaller transistors generally require less power to operate because they can (actually, must) be operated at a lower voltage. Dynamic (swtiching) power varies with the square of the voltage, so dropping the voltage a little makes the power go down a lot.

        But that's just switching power.

        As gate sizes shrink, previously negligible leakage (static) power increases. A lot. Now it's no longer negligible at the 90nm and 65nm process steps. In fact, it's getting very close to the same order of magnitude as switching power.

        That's a problem because you can limit dynamic power by switching more slowly, or not switching certain transistors at all (think mobile CPU speed throttling.) But leakage power is consumed even if the CPU clock isn't ticking. If voltage is applied to the chip, power leaks.

      • Re:Heat (Score:3, Insightful)

        by rsmith-mac ( 639075 )
        This means that if they were to make a current chip using the new 30% smaller technology, the result would probably produce about 30% less heat and use that much less power.

        Up until the latest process shrink(90nm), I would agree with you, but the laws of physics are starting to catch up with silicon chips. Intel, as has everyone else at 90nm, has had a major problem with current leakage with the process, which is causing any power savings to dissapear due to the excess leakage(and results in the infamous 1

      • Yes, and thankfully this new process doesn't increase the amount of leakage, which is where a great deal of the heat comes from. Though it doesn't reduce leakage either, and the chips will still be hot.

        Why do I care about heat output? The reasons are many. One, heat output is wasted energy. The Opteron is a more effecient chip -- it does more using 30 fewer watts. I pay for electricity. So does the environment. Having to evacuate the heat from the room is also a pain, and without air condition, the summer

        • Re:Heat (Score:3, Informative)

          by stratjakt ( 596332 )
          The 3.6 gig prescott puts out 115 watts [extremetech.com]

          This article puts the 3.2 and 3.4's at about 103 watts. [a1-electronics.net]

          This article pegs the Athlon 64 at 116 watts [hardwareanalysis.com].

          Yeah, you are engaged in CPU tribalism/fanboyism, whether you realize it or not. Both chips are pretty much equally "hot". One should use a different yardstick to compare the two.

          BTW, this article [idg.com.au] has the Itanium sucking 130 watts, which is probably where the misinformation came from.

          • Re:Heat (Score:4, Informative)

            by Rich0 ( 548339 ) on Monday August 30, 2004 @11:07AM (#10109344) Homepage
            Uh, that article was pre-release, and was for an AMD64 FX overclocked by about 15%. In fact, that was the power draw at the highest stable speed they could achieve with a -10C cooling system.

            According to this [amd.com], the AMD64 processors have a thermal design of 89W.

            According to this [intel.com] the comparable P4 has a thermal design of 115W.

            AMD has nothing to gain by recommending to OEMs that they be able to supply less power than the system requires, and to dissipate less heat. I purchased an AMD64 and find that it runs quite cool without any help besides the retail heat sink and fan (nothing special).

            FYI - half of the CPUs in my home are Intel-based. I'm hardly biased for the sake of being biased. However, when I went to build my computer I checked the specs and the prices and found that AMD64 was the best bang for the buck. And in the 64-bit world it is essentially uncontested at this point if you care at all about x86-compatibility. (Granted, that will change, and I look forward to whatever Intel comes out with to compete.)
          • Ahh. So I got confused between the Itanium and the P4. Thanks for correcting me!

            All that being said, instructions per watt, the Opteron is still ahead.
      • The reason you worry about heat disipation is that you pay for that heat many times. You pay for it at least 130% when you convert the electricity from AC to DC, then you pay for it around 300% when you air condition the office space. Overall a Watt of heat disipation costs around 3.5-4 Watts of total usage. Therefore the difference between a 80 Watt Opteron and a 130 Watt P4 is really around 200W. Larger thermal output also means more air needs to be moved to cool the chip, this generally means more noise
        • Overall a Watt of heat disipation costs around 3.5-4 Watts of total usage.

          I heat my home with electricity. Instead of spending watts on a radiator, i run my PCs all day (and all night) long. I wonder how efficient modern CPUs are compared to a standard radiator... anyone knows ?

      • Re:Heat (Score:3, Insightful)

        by darkmeridian ( 119044 )
        I have a Pentium IV E 3.0 Ghz. I need a huge Thermaltake solid copper heatsink and an extraordinarily loud fan and many case fans to cool the sucker off when playing DOOM III.

        If it dissipated less heat, my computer would dissipate less sound. = )

        Will
      • I don't really understand what the big deal is comparing the heat outputs of the P4 and Opteron is anyway,

        Here is probably the only appropriate call for:

        Imagine a beowulf cluster of those!

        Seriously, heat output and power consumption become a big deal when you have a room full of servers.

      • Re:Heat (Score:3, Interesting)

        by pclminion ( 145572 )
        Any way you look at it, the amount of heat generated by modern CPUs is ridiculously high. Let's compare it, shall we, to the power density of the frickin' sun.

        The radiant power of the sun, at the distance of about 95 million miles (i.e., Earth orbit), is 1350 watts per square meter. The radius of the sun is about 430000 miles. The ratio of the Earth's orbital distance to the sun's radius is 95000000/430000 = 221, let's call it 220 even. Now, power decreases with the square of distance, so take 220 and squ

    • Some people can't afford to have gas/electric heat and a PC in their home.

      Intel is hoping to win the home heating business, is all.

      • Re:Heat (Score:3, Informative)

        by shfted! ( 600189 )
        This funny, but true. Where I used to live, electricity was 7 cents per kilowatt all day long. It was actually more efficient to heat my house with a computer than use the natural gas heat, because recent new pipelines into the States had doubled and tripled the price of natural gas (market pricing and all) in the last decade.

    • Re:Heat (Score:3, Insightful)

      by 10Ghz ( 453478 )
      Opterons generate less than 100 watts. AFAIK the 100 watt figure is the absolute maximum amount of heat the chip-family will produce, _including upcoming, yet to be announced models_! Actual wattage right now for top-end Opteron is considerably below 100 W

  • Don't worry.... (Score:5, Funny)

    by harumscarum ( 675595 ) on Monday August 30, 2004 @09:56AM (#10108752) Journal
    it is not the size of the chip she cares about....it is the number of transistors you have.

  • Question (Score:2, Funny)

    by Soporific ( 595477 )
    Will this be incorporated into the new Unobtainium chip?

    ~S

  • EE Times article (Score:5, Informative)

    by PIPBoy3000 ( 619296 ) on Monday August 30, 2004 @09:57AM (#10108762)
    There's a better article here [eet.com]

    Within the 65-nm process, Intel has also devised a second-generation strained silicon technology. "The second generation of Intel strained silicon increases transistor performance by 10 to 15 percent without increasing leakage," Intel said. "Conversely, these transistors can cut leakage by four times at constant performance compared to 90-nm transistors."

  • Moore's Law (Score:5, Funny)

    by MikeMacK ( 788889 ) on Monday August 30, 2004 @09:58AM (#10108764)
    Yes, Moore is less - or smaller you could say.
    • My favorite law is of course...
      Cole's Law:

      Thinly Sliced Cabbage
      I think it states also that the cabbage gets sliced thinner every 18 months or something to that effect...

  • It's obvious... (Score:5, Funny)

    by Anonymous Coward on Monday August 30, 2004 @09:58AM (#10108767)
    ...they've found a way to get rid of the base, collector, or emitter. Unfortunately, these new transistors can only store zeros.
    • Gee, now if they could only intersperse these new transistors that can only store zeroes with some transistors that can only store ones, we could make an effective storage medium. Congratulations, we just invented ROM again. :)
    • Even funnier considering MOS transistors don't have a B,C, or E. Try drain, source, and gate. :)
  • I dont get it.
    70Megabit ~= 10 Mbyte. Thats not that big.
    Also this would mean each bit uses 14 transistors. I think they mean megabyte and each bit uses ~2 transistors.

    • Re:70 Megabit? -- Static RAM, not DRAM. Also 7T (Score:5, Informative)

      by elwinc ( 663074 ) on Monday August 30, 2004 @10:09AM (#10108871)
      You're thinking DRAM, with one transister per bit, but slow (plus it needs refreshing every 60msec or so). Static RAM is mucho faster, with 4 to 8 transistors per bit.
      Also, your math is in error. 500M transistors for 70 Mbits works out to 7 transistors per bit. I'm guessing the visible portion of the chip will be 64Mbits and 6 transistors/bit, with most the rest of the transistors allocated as spares. When you make a chip that big, you can boost yield by making spare blocks of memory that during manufacturing can be substituted for bad areas on the chip.

    • Re:70 Megabit? (Score:3, Interesting)

      by T-Punkt ( 90023 )
      I don't know where the 500M transistors mentioned in the submission come from. I don't find it in both linked articles. I doubt the 64MBit chip (~67E6 bit, marketing makes that 70) uses that much transistors. I think the 64MBit chip is just a demonstration/benchmark for the new process since it's pretty easy to scale a memory chip design to a smaller gate size due to its simplicity.

  • Now are we going to start getting spam... (Score:5, Funny)

    by Black Parrot ( 19622 ) on Monday August 30, 2004 @09:58AM (#10108772)

    ...selling methods for reducing the size of our transistors?

  • This is news? (Score:5, Insightful)

    by Anonymous Coward on Monday August 30, 2004 @09:59AM (#10108779)
    I work for Intel, and I gotta say--we do this every couple of years, and this wasn't a particularly stunning or unexpected part of our roadmap. If you wanted a more sensationalist headline for a pretty expected bit of news you might try the old "Intel Proves Moore's Law Not Dead Yet"

  • missing word (Score:5, Funny)

    by mondoterrifico ( 317567 ) on Monday August 30, 2004 @09:59AM (#10108781) Journal
    "The tech details are sadly lacking in the article - but I'm those will follow."
    At least that is one way to reduce typos by slashdot editors, just start leaving out entire words. :P

    • Re:missing word (Score:5, Funny)

      by gclef ( 96311 ) on Monday August 30, 2004 @10:04AM (#10108829)
      Nono, he's actually making a grand, religious statement: I am, those will follow. Meaning, I exist, I have memory, all other memory is simply following after me. Hemos has actually obtained enlightenment, and is trying to show us the way through RAM.
    • The word "sure" was posted in an earlier article summary today, and Hemos was trying to avoid a dupe. We can't blame him for trying, can we?
  • But you need several inconveniently large buildings to house the cooling system...

  • Heat issues (Score:5, Insightful)

    by Biotech9 ( 704202 ) on Monday August 30, 2004 @10:01AM (#10108797) Homepage
    The company also developed so-called sleep transistors that shut off the electrical current to areas of a chip that aren't being used. As a result, power consumption drops -- something that will decrease heat generation and help battery-powered devices last longer between charges.

    This sounds like a great way to tackle heat and power problems with laptops (and PCs, it's not like modern PCs don't have heating trouble too). I'd lay a bet though, that it'll still run hotter than the P4s, it seems there should be an addenium to Moores law.

    The number of transistors on an integrated circuit would double every 18 months, and that integrated circuit will get pretty damn shit hot
    • nah, we'll stick more on every chip (hence more heat) until it becomes so horribly overkill for every home user that no one can justify the cutting edge to play Doom 6. (so it'll be a little while, but my guess is in our lifetime)

  • Half way there. (Score:5, Insightful)

    by Chess_the_cat ( 653159 ) on Monday August 30, 2004 @10:02AM (#10108811) Homepage
    Moore predicted his Law would run out in 2012 when 1 billion transistors are fit on a chip. Looks like we're ahead of schedule.

  • Official Press Release? (Score:5, Funny)

    by tjhayes ( 517162 ) on Monday August 30, 2004 @10:07AM (#10108852)
    This can't be any official sort of press release...nowhere do they measure the size of the transistors by how many it takes to equal the width of a human hair!

  • 35 nanometers (Score:4, Interesting)

    by kippy ( 416183 ) on Monday August 30, 2004 @10:11AM (#10108891)
    With the switches this small, is it safe to say that they are using nanotechnology? I know it's not the cool molecule-sized-killer-robot style nanotech but this seems to fit the description of devices on the scale of a nanometer.

  • Tha's odd wording (Score:5, Informative)

    by randyest ( 589159 ) on Monday August 30, 2004 @10:14AM (#10108915) Homepage
    "Reduced transistor size by 30%" is an odd way to announce moving from a 90nm to a 65nm process.

    Just to help avoid any confusion here, this is not some new clever transistor design or something. It's just another incremental step in process size reduction. It happens every few years. And it's not just Intel -- I know IBM and NEC are doing 65nm right now as well. I suspect TSMC and UMC are also, though I'm not sure (I know UMC had problems in 90nm that they're still fighting with . . )

  • Official Press Release (Score:3, Informative)

    by Anti Frozt ( 655515 ) <{chris.buffett} {at} {gmail.com}> on Monday August 30, 2004 @10:22AM (#10108971)

    I submitted this earlier, but was rejected.

    Anyway, here [intel.com] is the offical press release from Intel's website.

    • The transistors in the new 65nm (a nanometer is one-billionth of a meter) technology have gates (the switch that turns a transistor on and off) measuring 35nm, approximately 30 percent smaller than the gate lengths on the previous 90nm technology. For comparison, about 100 of these gates could fit inside the diameter of a human red blood cell.

      there you go.

      a comparison of transister to body part sizes. they're even using smaller body parts...

  • "Will announce" (Score:4, Funny)

    by BHearsum ( 325814 ) on Monday August 30, 2004 @10:31AM (#10109039) Homepage
    Did they announce it? Or is Miss Cleo now employed by /.?
  • Seriously, I mean advancments in shrinking are good, but wouldn't it make more sense to increase the cpu size (maybe double it). As is, it only takes up a 1 inch space on my motherboard, lets take up 3 or 4 inches. Would it be too hard to cool something that large? I would think by increasing the size we could make more powerful processesors with the same level of technology.
    • I would think by increasing the size we could make more powerful processesors with the same level of technology.

      Good Lord, man. Don't you realize that all technology must be built around the idea of creating a Terminator by 2025? How can the Terminator operate if he has a processor that is too large to be housed inside of his alloy skull?

      I swear, some of you just never get with the program.

      BTW: Has anyone seen my nuclear reactor the size of a D cell battery? The one that can power the T-486 series termi
    • It costs the same to make 1 wafer with 1000 chips as it does to make 1 wafer with 5 chips. So by shrinking the size you can put more chips on a wafer, and reduce manufacturing costs (per chip).

    • Re:Why do cpu's have to keep getting smaller? (Score:4, Informative)

      by Aadain2001 ( 684036 ) on Monday August 30, 2004 @11:23AM (#10109501) Journal
      The problem is production, not cooling. By making the CPU die bigger, you a) decrease the number of dies you can make on a single wafer, which costs a fixed amount to produce, thus making each CPU more expensive; and b) defects that would have only scrapped 1 die out of 300 will now scrap 1 die out of 50, thus making the yields lower, raising the cost per die, making the CPU more expensive to the consumers. Decreasing the die size and increasing the wafer size leads to cheaper chips which is a Good Thing (tm). A nice side affect is that it also allows for higher clocking, which is both good (more ops per second) and bad (current leakage and heat issues). Smaller dies also consume less voltage, which is again a Good Thing (tm). Just have to get current leakage, a Bad Thing (tm), down and the chips would run cooler and consume less power. This new process is better at current leakage, so thats a Good Thing (tm). All in all, making the CPUs smaller is good for Intel and good for the consumer.

  • Intel Announcement (Score:3, Funny)

    by digitalgimpus ( 468277 ) on Monday August 30, 2004 @10:44AM (#10109160) Homepage
    Tomorrow intel will announce it's achieved tempuratures greater than Sun (fire ball in middle of solar system, not server company).

    Intel's product line will include an alternative to the popular "George Foreman Grill". Intel's grill, powered by the PIV processor will grill a "Big George" style hamburger in under 30ns.

    Microsoft is expected to make an announcement in coming weeks to annouce it plans to dominate the college cookware industry by selling inferior products at lower costs with Hamburger DRM.

  • Intel (Score:4, Insightful)

    by JerryLs ( 587277 ) on Monday August 30, 2004 @10:44AM (#10109162) Homepage
    May I ask why, every time they shrink the size of components, they feel a need to put more on the chip? I realize more can be done, but with all the heat/power problems with increased density, why not use the space with chip power you already have? The result would be a cooler, lower power device.

    • Density matters (Score:3, Interesting)

      by melted ( 227442 )
      First of all, they were talking about memory modules there. The more transistors you can fit on them, the bigger memory modules will be. With 64bit computing on the horizon it's about time they increased module sizes and made 2G and 4G modules as common as 512M and 1G are today.

      Second of all, you don't have to put more stuff on the chip. They just say they now can do it. They also can make smaller chips doing the same thing which means better yield and less cost.

  • The limit of quantum interference will soon be reached below of which no more close packing will be possible since the transistors will not be able to function properly. The electrons will choose to develop superpositions of states (of 1 and 0) with unpredictable results.

    Well a fundamental new design has to be implemented, and I guess that's where quantum computing steps in...

  • 70 megabit = 8.75 megabyte (google)

    does this neccessarily mean we are going to get larger capacities of chips ? or does it mean we can run our memory busses faster?

    Nick...

  • Mixed signals (Score:4, Funny)

    by UnknowingFool ( 672806 ) on Monday August 30, 2004 @11:13AM (#10109391)
    First a story on /. about better lubricated, faster hard drives [slashdot.org]. Then another story about shinking chips. Is Cmdr Taco trying to give me a complex?

  • Ja (Score:2, Funny)

    by essreenim ( 647659 )
    You zee, ferst we take ze reduced size transeestors, and then we use thm in ze new dual core processorz so that even though you zink the procezzor will be smaller - pop - ze prozezzor weeel be bigger and e'more cumbersome and eexpanzive zan before, ja..

  • <flame>
    Being a computer engineer, I'm quite familiar with Moore's law, it's the reason I continue to find open jobs. Since when did Moore say "doubles every two years"?!? It is "doubles every 18 months" you incompetent journalist!!
    </flame>

    The Widget

  • For those who want more tech detail... (Score:3, Informative)

    by Transcendent ( 204992 ) on Monday August 30, 2004 @11:39AM (#10109644)
    Reuters [reuters.com] has more detail on the whole process, and how this will help not only in memory, quoting:

    "In a bit of semiconductor showmanship, Bohr said Intel had manufactured a memory chip with more than a half-billion transistors using its new 65-nanometer manufacturing process, which was developed at its site in Hillsboro, Oregon. "

  • My mind is racing!!!! (Score:3, Funny)

    by trailerparkcassanova ( 469342 ) on Monday August 30, 2004 @01:38PM (#10110787)
    Holy cow!!! I bet someday we'll be able to carry a radio in our shirt pocket.

  • In other news.... (Score:3, Insightful)

    by MemoryDragon ( 544441 ) on Monday August 30, 2004 @03:46PM (#10112031)
    Intel shrinks the number of commands of the x86 architecture by 30% thus resulting in less heat and a global saving of energy of multiple gigawatts per month.

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