Stanford Uses Million-Core Supercomputer To Model Supersonic Jet Noise

coondoggie writes "Stanford researchers said this week they had used a supercomputer with 1,572,864 compute cores to predict the noise generated by a supersonic jet engine. 'Computational fluid dynamics simulations test all aspects of a supercomputer. The waves propagating throughout the simulation require a carefully orchestrated balance between computation, memory and communication. Supercomputers like Sequoia divvy up the complex math into smaller parts so they can be computed simultaneously. The more cores you have, the faster and more complex the calculations can be. And yet, despite the additional computing horsepower, the difficulty of the calculations only becomes more challenging with more cores. At the one-million-core level, previously innocuous parts of the computer code can suddenly become bottlenecks.'"

five-dimensionally connecting the cores

[girlinatrainingbra]

Okay, so I see that they have 1,572,864 cores which happens to be

1 572 864 = 2**19 + 2**20 = (2**19)*3 = (524288)*3

I'm wondering about how they've connected the CPUs. There's probably 4 cores per cpu, so drop the powers of 2 by two above. There's a link on the Wired article [wired.com] that says:

But Sequoiaâ(TM)s processors are organized and networked in a new way â" using a âoe5D Torusâ interconnect. Each processor is directly connected to ten other processors, and can connect, with lower latency, to processors further away. But some of those processors also have an 11th connection, which taps into a central input/output channel for the entire system. These special processors collect signals from the processors and write the results to disk. This allowed most of the necessary communications to occur between the processors without a need to hit the disk.

But searching for "5-d torus interconnect" gets you nothing on wikipedia. Here's the 2-dimensional version explanation: http://en.wikipedia.org/wiki/Torus_interconnect [wikipedia.org]
and the K computer by Fujitsu [wikipedia.org] at Riken uses a 6-d (six dimensional) torus network. So how does the 5-d torus interconnect lead to the 2**19 + 2**20 cores or possibly 2**17+2**18 cpus? I'm not seeing it in my head clearly. Off to a paper-napkin to sketch it out!
.
Each core connects 5-dimensionally going forward or back in each dimension gives 10 interconnects from one core to the 10 5-dimensional neighbors one distance away. But the number of cores is divisible only by twos and a three (factor number of cores = 3 * 2^19) so I'm not seeing the construct...