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Breakthrough May Revolutionize Microchip Patterning 62

Posted by Zonk
from the grow-your-own-chips dept.
Stony Stevenson writes "US research engineers claim to have developed a low-cost technique that allows them to create ultra-small grooves on microchips as easily as 'making a sandwich'. The simple, low-cost technique results in the self-formation of periodic lines, or gratings, separated by as little as 60nm, or less than one ten-thousandth of a millimetre. From the article: 'The new 'fracture-induced structuring' process starts when a thin polymer film is painted onto a rigid plate, such as a silicon wafer. A second plate is then placed on top, creating a polymer 'sandwich' that is heated to ensure adhesion. Finally, the two plates are prised apart. As the film fractures, it automatically breaks into two complementary sets of nanoscale gratings, one on each plate. The distance between the lines, called the period, is four times the film thickness.'"
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Breakthrough May Revolutionize Microchip Patterning

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  • Silicon! (Score:5, Informative)

    by the_kanzure (1100087) on Monday September 03, 2007 @12:19PM (#20452583) Homepage
    Here's my notes on silicon semiconductor manufacturing [heybryan.org], but this 'polymer sandwhich' method is entirely new to me. From what I can recall, manufacturing tactics usually include chemical etching with masks to make marks into the wafer or sometimes with specialized lasers. From the summary of the article, it looks like this latest process lets us do periodic lines via adding mechanical energy so that we fracture the plates. Ironic, since we usually try to avoid fracturing our wafers. ;)
  • 60 nm features? (Score:2, Informative)

    by chillax137 (612431) on Monday September 03, 2007 @12:26PM (#20452631) Homepage
    So this method is interesting, but the resolution of these gratings is only 60nm. Other experimental groups have achieved a resolution as small as 30nm (http://willson.cm.utexas.edu/research/index.php [utexas.edu]). ..and Intel is already producing chips at 45 (http://hardware.slashdot.org/article.pl?sid=07/08 /20/1611202/ [slashdot.org])
  • by kebes (861706) on Monday September 03, 2007 @01:08PM (#20452971) Journal
    The actual scientific paper can be found here [nature.com] (subscription required). This is a very neat idea, similar to buckling-induced experiments where similar nano-patterns can be produced quickly and easily in polymeric materials. The micrographs in the paper show remarkably clean and consistent structures, with well-defined periodicity and cross-section. From a scientific point alone, it's quite remarkable to see how one can harness a usually random process (fracture) to generate well-defined nanostructures.

    That having been said, this technique suffers from a few limitations. Firstly, it will be difficult to scale this down to arbitrarily small features: polymer film stability becomes increasingly difficult as the film thickness is decreased, so this technique is unlikely to scale cleanly below the 60 nm they've already demonstrated. Also, this technique generates a large-area pattern, but it doesn't appear possible to control the registry of this pattern. So, this could perhaps be used as the first step in a mult-step chip patterning, but if you can't align subsequent patterns, it becomes useless for generating complex multi-layered structures for chips. (I can imagine ways to overcome this, but it wouldn't be easy.)

    As such, I really don't think this is going to "revolutionize microchip patterning" as the headline implies. I don't think this will ever be used to generate smaller and smaller chips: the current challenges in the industry for next-generation processes are beyond what this technique can do. (Besides which, it doesn't integrate particularly well into the current photo-lithography infrastructures).

    However, as a lower-cost alternative for fabricating nanostructures in the micron to 100 nm size regime, I could see this being useful. It's an easy way to create a large-area array of remarkably consistent patterns. It could be used to create optical gratings, or as a template for assembly of proteins (for diagnostics, etc.), or templates for magnetic domains (in hard-drives, etc.) and many other fields.
  • by kebes (861706) on Monday September 03, 2007 @04:15PM (#20455435) Journal
    Indeed. The line-edge-roughness is becoming a bigger and bigger issue as the lithography industry searches for what to use for next-generation patterning technology. Based on the talks I've been to (I do research in a related field), the large efforts that were put into developing "extreme-ultraviolet lithography" (EUV), which would use 13.5 nm illumination, are not working out. The technology is not ready (e.g. they still don't have a light-source operating at that wavelength that generates enough light...) and is very much more expensive than anything we're using today. Many in the research end are now thinking that we cannot depend upon EUV to fill the future roadmap nodes.

    I agree that there are going to have to be some big changes. Some sort of disruptive technology is going to be needed. One promising area is the rather simple concept of "nanoimprint lithography": where instead of using light to shine through a mask and pattern a polymer resist (which is then used to etch patterns into the silicon), you physically press a single (reusable) high-fidelity (high-cost) mask into a polymer, at a temperature where the polymer is liquid-like. The patterned polymer resist can then be used to etch Silicon in the usual way.

    This physical embossing has been shown to generate pattern fidelity way beyond what you would naively expect: sub 30-nm feature accuracy has been demonstrated. Nanoimprint is a comparatively simple and cheap methodology. When combined with the other recent advances in lithography infrastructure (like high-precision registry alignment systems), it seems quite plausible that nanoimprint will be able to deliver the features required for next-generation chips. Of course, many details need to be worked out, but it's a very promising, and rather disruptive, new technology (and has been added to the ITRS roadmap [eetimes.com]).
  • by Anonymous Coward on Monday September 03, 2007 @04:41PM (#20455731)
    I could think of a couple of things. a CCD for cameras or a 'rail' area for moving data around. Also if you could get it going in different directions you could 'build' up different structures such as gates and sinks. You could also 'fill' in areas that are not useful or 'short' across other areas with another layer. Dont be like Kahn and think 2d be like Kirk think 3d...

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