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Breakthrough May Revolutionize Microchip Patterning

Posted by Zonk on Mon Sep 03, 2007 11:01 AM
from the grow-your-own-chips dept.
Science Hardware Technology
Stony Stevenson writes "US research engineers claim to have developed a low-cost technique that allows them to create ultra-small grooves on microchips as easily as 'making a sandwich'. The simple, low-cost technique results in the self-formation of periodic lines, or gratings, separated by as little as 60nm, or less than one ten-thousandth of a millimetre. From the article: 'The new 'fracture-induced structuring' process starts when a thin polymer film is painted onto a rigid plate, such as a silicon wafer. A second plate is then placed on top, creating a polymer 'sandwich' that is heated to ensure adhesion. Finally, the two plates are prised apart. As the film fractures, it automatically breaks into two complementary sets of nanoscale gratings, one on each plate. The distance between the lines, called the period, is four times the film thickness.'"
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Submission: Breakthrough revolutionises microchip patterning by Stony Stevenson (954022)
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  • Well... (Score:5, Funny)

    by Icarus1919 (802533) on Monday September 03 2007, @11:09AM (#20452487)
    Generally I throw my sandwiches away when they get a film on them.
  • If they got clever, they could make a conductive film and get tracks at one times the films thickness ;)
    As it stands I will only be impressed if they get fractures down to at least 2 times thickness.

  • Nice. (Score:3, Funny)

    by TechyImmigrant (175943) * on Monday September 03 2007, @11:13AM (#20452529) Journal
    The chips are groovy. Very groovy.

  • Impressive... (Score:5, Funny)

    by smallfries (601545) on Monday September 03 2007, @11:13AM (#20452531) Homepage

    "It is like magic," said electrical engineer Stephen Chou, the Joseph C. Elgin Professor of Engineering at Princeton.

    Must be a sufficiently advanced technology then...
  • A low cost replacement for current lithographic techniques at 60nm could certainly have a market niche.

    But from what I understand of the article, this technique only creates a pattern of parallel stripes, with the spacing controlled by the film thickness. Presumably the direction is cotrolled by which edge you pry apart from. I don't see how that is useful for layout out a chip though.

    • Re:Is this really useful for 'patterning microchip (Score:1, Informative)

      by Anonymous Coward
      I could think of a couple of things. a CCD for cameras or a 'rail' area for moving data around. Also if you could get it going in different directions you could 'build' up different structures such as gates and sinks. You could also 'fill' in areas that are not useful or 'short' across other areas with another layer. Dont be like Kahn and think 2d be like Kirk think 3d...

  • Silicon! (Score:5, Informative)

    by the_kanzure (1100087) on Monday September 03 2007, @11:19AM (#20452583) Homepage
    Here's my notes on silicon semiconductor manufacturing [heybryan.org], but this 'polymer sandwhich' method is entirely new to me. From what I can recall, manufacturing tactics usually include chemical etching with masks to make marks into the wafer or sometimes with specialized lasers. From the summary of the article, it looks like this latest process lets us do periodic lines via adding mechanical energy so that we fracture the plates. Ironic, since we usually try to avoid fracturing our wafers. ;)
    • Ironic, since we usually try to avoid fracturing our wafers.

      Is it just me, or does that sound kinda dirty?

      God, I hope it's not just me...
  • I always love when summaries on /. have useless unit conversions to somehow make them more tangible.

    I think people here can handle 60nm.

    • I always love when summaries on /. have useless unit conversions to somehow make them more tangible.

      Indeed, everybody knows that the standard unit for small distances in science news reporting is (human hair width)^-1. Why they didn't use this standard unit escapes me.

      • Indeed, everybody knows that the standard unit for small distances in science news reporting is (human hair width)^-1. Why they didn't use this standard unit escapes me.
        Your standard unit of distance has units of inverse distance. You might want to fix that. :-p
    • So that Slashdot regulars can appropriately visualise the distances involved: 60nm = 2.98258172 × 10-10 furlongs.
  • So this method is interesting, but the resolution of these gratings is only 60nm. Other experimental groups have achieved a resolution as small as 30nm ( http://willson.cm.utexas.edu/research/index.php [utexas.edu]). ..and Intel is already producing chips at 45 (http://hardware.slashdot.org/article.pl?sid=07/08 /20/1611202/ [slashdot.org])
    • Actually, no.

      Intel is producing chips at 45 microns.
      That is 45,000nm.

      So making lines at 60nm, is a BIG DEAL.

      • Actually, no.

        Intel is producing chips at 45 microns. That is 45,000nm.

        So making lines at 60nm, is a BIG DEAL.


        ACTUALLY no...

        they are 45nm... research before u post...

        on this site [slashdot.org] AND on their site [intel.com]
    • I suspect that it would cost a bit more for Intel to produce 60nm gratings using their 45nm process than using this "low tech" approach.
    • Intel isn't doing it inexpensively. This is supposed to be a dirt-cheap way to get to 60nm.

      How many chips are in your home? How many of them are general purpose CPUs? Your video card, unless it's really recent, is almost surely not down to 60nm. Your drive electronics, Ethernet controllers, PDA CPU, cable/DSL terminal, router, firewall, car, coffee pot, TV tuner, DVD player, digital camera (except maybe the image sensor), appliance timers, remote control, home theater receiver, and pocket calculator are not
  • The linked article has a picture of a breadboard covered in neat rows of ancient DIP chips (probably ALUs or memory). Then talks about a cool new technique for getting a 60nm grid on next-gen CPUs.

    Why do they bother wasting bandwidth with such a useless stock picture? "Well, this involves microchips... Those look like microchips, I guess, so let's stick it in the article".

  • I have no arms, you insensitive clod!

    Rob
  • The trouble with technological breakthroughs is that they mostly benefit countries which place zero emphasis on such development but 100% emphasis on the pirating and subsequent marketing of such technology.
    • Piracy is a valid economic warfare tactic. Countries steal/spy/etc from one another for economic advantage and diplomatic leverage, should we be surprised? After all market capitalism emphasizes competition, no one said it had to be *fair*.
      • So we're talking about defining the boundary between reprehensibility and hostility, then? Personally, I would hesitate to suggest that it is valid for any country to profit in a worldwide economy using technology they have acquired and utilized without permission. But perhaps you would be fine even with the recent revelations of Pentagon hacking. Perhaps that also is "valid". To others, it's an act of war. Ymmv.
        • Capitalism is a form of social warfare, it's not always 'conscious' most of us simply absorb the behaviour and values of our time unknowingly contributing to overall bad things happening in the world. You also have people who have insane amounts of capital vs people who can't even afford to live in the same country. You have people commit suicide for economic related reasons (stress, etc), when there is more then enough money to go around in many instances. But access to that money is a matter of culture
  • I doubt CPUs will have much competition from this technology, but how about memory based on some kind of crossbar design? Make one sheet vertical one sheet horizontal bond together with some exotic ingredient and voilà -- a high density ROM material. HD movies on a postage stamp.
  • thats good but what does it allow/do?
  • I wonder if you pulled a disc-shaped sandwich apart from the center real fast would you get concentric circles like a fresnel lens.. if so then by varying the film thikness you could vary the wavelength of focused energy?
    • But you need to remember, the 45nm number comes from the marketing department.
      • No, it does not. Not at all. It comes from the litho engineers that chose 45 nm as the minimum feature size, a physical constant of the manufacturing process. And it was chosen because it is half of 90 nm. The marketing department would have literally nothing to do with such a selection.
        • You honestly believe that the marketing department didn't come down to the engineering department to suggest this figure?

          "Lads, AMD is making 90nm chips right now, so they must be working on 45nm chips! If we can't compete we'll all be out of jobs. Now, can you make 45nm chips? Of course you can't! Will you be able to by the time we have to release them? Excellent!"
          (Marketing manager writes down 'action point: leverage 45nm technologies for potential market capitalization'. In the background the lead eng

    • Re:hmm (Score:4, Insightful)

      by cyfer2000 (548592) on Monday September 03 2007, @11:18AM (#20452577) Journal
      The selling point of this "new" technology is "low cost". The lithography at sub 100nm is getting extreme pricey.

      • Re: (Score:3, Insightful)

        by MindKata (957167)
        I agree the cost is high (for the FABs) but more to the point, while this is an interesting new manufacturing method, its not likely to be such a big advance, (for the chip industry) as the title to this news implies. Also I think that around about 2011, they are talking about having production 32nm fabrication. So within about 4 years from now, 32nm is going to seem very small, compared with this relatively large 60nm groves in the chip.

        Where this technology sounds potentially very useful, is in maybe ap

        • Re:hmm (Score:4, Interesting)

          by Nikker (749551) on Monday September 03 2007, @03:44PM (#20455779)
          I don't think it is as important for FAB plants as much as it is bringing influence from the small consumer into hardware. If the cost comes down enough we can take old designs or open designs and actually be able to produce relatively small quantities of modified hardware for cheap.

          This would go hand in hand with the concept of OSS cause as OSS enthusiast's are intrigued by this kind of thing products like that completely OSS graphics board which never really took off would be much more attainable. With an interface like PCI-Express if the community would be able to design an 'open-board' concept, with multiple open sockets on the board its self, you would be able use the daughter board as an OSS motherboard and control it by use of an open interface.

          Picture a PCI-E board with one controller on board and a handful of open PGA sockets. A company or group develops a physics, encryption, sound, graphics, firewall chip that gets installed on the board and you could access each one for its resources via the PCI bus. Each chip would likely be more expensive then the closed proprietary brothers but the market is there. Lets say your business has a project that is naturally lopsided in terms of processing, you could fabricate a processor to even it out, or make a self sufficient board utilizing the PCI bridge for nothing more then access to memory and VCC.

          This would really be an eye opener as OSS could effect more then just the software market but the hardware market as well. You could have a board with optical, RJ45, DVI, DVB-S2 all on the same board and each socket could potentially have access to each port directly or via on board controller (similar to a north bridge) condensing a sound controller or a network controllers logic onto a 60nm process would be night and day compared to what we have, this could potentially lead the way to the entire machine being designed using this "sandwich" process.

          Personally I think development along the lines of the killerNic type of hardware would revolutionize computing. Imagine owning a machine with multiple optical outs that you could use for networking or to hookup to a TOS-link device, the card would have its own processor running customized microcode. Maybe as a temporary storage device similar to flash drives but internal running of a 16x slot would bring efficiency of any system up 100 fold. Eventually all these separate ideas would distill into an open command set that could be implemented into a CPU type of application. A CPU with instructions built-in from the best of encryption, graphics, sound, filtering hell even regex. We could even vote on which registers should be included in the final design.

          So you know one person out here thinks this is cool, maybe more will come of this.
        • Surely your toaster and coffee maker don't need 32nm? Wouldn't it be great to have all the parts that aren't CPUs down to 60nm without the costs associated with 60nm lithography?

          Let's see, drive electronics, sound processors, Ethernet controllers (the ones that aren't on your southbridge), microcontrollers, any kind of embedded chip... There are lots of things that aren't 65 nm yet, or even at 90nm, and some chips aren't 130nm for that matter. Wouldn't it be great to get things that are currently larger dow
      • The actual scientific paper can be found here [nature.com] (subscription required). This is a very neat idea, similar to buckling-induced experiments where similar nano-patterns can be produced quickly and easily in polymeric materials. The micrographs in the paper show remarkably clean and consistent structures, with well-defined periodicity and cross-section. From a scientific point alone, it's quite remarkable to see how one can harness a usually random process (fracture) to generate well-defined nanostructures.

        Th
        • But I think you are insightful. I am actually totally agree with you. But as the UV getting deeper and deeper, how far the photoresist based technology we can go? At 32nm or 25nm, how much roughness is tolerable? Can we expect such roughness from photo resist? I think there is going to be a change.

          • Re: (Score:3, Informative)

            by kebes (861706)
            Indeed. The line-edge-roughness is becoming a bigger and bigger issue as the lithography industry searches for what to use for next-generation patterning technology. Based on the talks I've been to (I do research in a related field), the large efforts that were put into developing "extreme-ultraviolet lithography" (EUV), which would use 13.5 nm illumination, are not working out. The technology is not ready (e.g. they still don't have a light-source operating at that wavelength that generates enough light...
            • The light source problem maybe solved by microsource X-ray source or microsynchrotrons (not very possible) and non-flat multilayer (Gobel mirror) based optical system. Or we are going to construct fabs with synchrotron. Let's wait and see.
        • It's nice to read one of these rare insightful posts on slashdot. In fact I may close my browser before scrolling any further :)

          I think you've hit the nail on the head that registry is the key problem. This reminded me of Rothemund's work [caltech.edu] although their pattern structures are slightly finer than the DNA scaffolding that he created.

          If either technique paid off (ie to the extent that components could be attached to arbitrary points in the pattern) then it would revolutionise chip design. But, that is quite a
        • It would seem to me that the registry and formation of the pattern would actually be greatly controllable. Per the summary (I'm not THAT new), "The distance between the lines, called the period, is four times the film thickness." To me, this indicates that, by using one smooth platter and one textured platter, one could, quickly and reporoduceably, control the registry of the lines on the smooth platter.

          One would need only one "perfect" (master) platter to copy from, similar to pressing CDs. This master pla
          • There are two problems here, how can you make a 1nm deep line? Secondly, the process really scale very well even the pitch is very close to the size (Rg, for some other people) of the polymer used?

      • The lithography at sub 100nm is getting extreme pricey.

        Well 'pricey' is a relative term... if you're talking about the setup-cost for a factory that produces IC wafers, then yes you're talking enormous investments before the first wafers run of the production line with decent yields. But from an end-user point of view, you can buy a $50 CPU or memory module these days that may contain several hundred million transistors. Something equivalent being non-existent or 10 times more expensive a few years back...

        I'm wondering more about practical applications

        • It was the mask and photoresist for sub-100nm process in mind at the time I was posting. I think this technology may have some potential application in making simple grid structure like NAND flash/sonos memory, PRAM, FeRAM, MRAM and etc. I don't think it could be used to make DRAM, where most effort is put to dig deep holes. And it will face strong compete from block copolymer based technology at smaller dimension like 30nm. However, the grid grown by this technology can be used as template of block copo

    • Re: (Score:3, Insightful)

      by 2.7182 (819680)
      Additionally, there are so many announcements like this that you have to see it on the market to believe it.
    • I don't remember what the commonly used nm figure refers to (channel size?), could be that the 60nm lines here are for something else.
      • Everybody seems to be looking at this for electronic chip production. I don't see that being usable at all with this. This seems more geared to producing optical diffraction gratings, sensors or maybe even use in solar cells. I.E. Take a normal photovoltaic cell, then put a thin film on top and use this to create a tuned diffraction grating on the surface that improves the solar cell effeciency. Same for optical sensors. I could also see potential uses in biological sensors.

    • Re: (Score:2, Interesting)

      by ItsLenny (1132387)
      how is it a breakthrough you say...

      Lets see...

      They've come up with a similar (faster/cheaper) means of making something. The entire point of the article is that this new method is far easier and faster then old methods. Not to mention the fact alone that it's utilizing mechanical force to etch a chip which is unheard of... besides this could be very practical. Think about it, most companies don't need an overpriced chip with 45nm spaced etchings... but being able to buy many cheaper chips with a 60nm

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